1. Technical Field
The disclosure relates in general to a manufacturing method of a semiconductor device, and more particularly to a manufacturing method of a semiconductor device including a plurality of fin structures.
2. Description of the Related Art
According to the development of the semiconductor technology, a system on chip (SOC) is an integrated circuit that integrates all components of a computer or other electronic system into a single chip. It may contain digital elements, memory cells, analog elements, mixed-signal elements, and radio-frequency function elements. All of those elements are integrated on a single chip substrate. The system on chip (SOC) integrated circuit which has small volume, low power consumption and short response time has been widely used in daily life and business.
A semiconductor device may be divided into several areas. In one case, a top surface of one area may be much rougher than a top surface of another area. In this case, a material disposed in those two areas may not be polished to be flat. The nonplanar surface will generate physical defects in back-end manufacturing processes and may cause electrical defects, such as shorts and opens that interfere with device performance and therefore decrease yield. One process-induced defect is caused from residual material which arises when excess material deposited on back-end structures is not completely removed by a planarization process such as chemical-mechanical planarization (CMP). For example, process-induced defects can occur due to a non-uniform pattern density which leads to a non-uniform polish. Therefore, it is an important quality issue to be solved.